As integrated circuit memories become larger and more complex, reliability of individual components becomes increasingly important. In general, no matter how reliable each component is the system reliability goes down inversely as the number of components increases. For memory systems, parity or error correction has historically dealt with this problem by considering that every device had an independent failure rate compared to every other device of the same nature.
In general, prior art error correction systems have been directed to independent failures on a board. In general, substitution of spare elements for defective elements incorporated in a memory involved the alteration of the circuit configuration on an individual chip. This was typically accomplished by the use of fusible links or destructive changes in individual cell characteristics by, for example, a laser beam directed at the chip. Other prior art error correction method involve redundant columns of cells which can be electronically substituted by suitable circuitry to columns containing defective cells.
In general, these prior art arrangements are effective for independent failures on a board. As memory technology advances, however, the dominant error mode will shift to multiple bit errors (dependent error mode). Today's DRAMs or memories have multiple outputs per chip (chip kill will affect from four to eight outputs per chip), giving each bit a dependent failure rate. In these situations, it would be desirable for a correction mechanism to map out and replace a failed memory chip in its entirety rather than just compensating for a single bit lane loss.
The present invention is directed to a mechanism for placing spare memory chips at any location in a memory array to replace defective memory chips. A memory of 256 MEGABYTES, for example will have about 2500 chips. By past experience, a time between failures of 3/4 of a year for the total system can be assumed. If the offending memory chip is replaced by a spare memory chip, then the 3/4 of a year failure rate can be stretched to the service life of the system.